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AMD's Changing Roadmap Adds "Zacate" Notebook Chips

 & Michael J. Miller Former Editor in Chief

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In separate announcements in the past week, AMD has released more details of its manufacturing plans, and announced a new processor aimed at the mainstream notebooks as well as desktops.

This follows the company's recent announcement of details of its Bobcat and Bulldozer CPU cores, which will become the heart of most of the company's new products over the next couple of years. Together, this sets the stage for a lineup of CPUs and "APUs" (accelerated processing units—chips that combine CPU and GPU technology) that has changed considerably from what we were expecting at the beginning of the year.

AMD

Let's start with the new chip. In its earlier discussions of the Bobcat core, AMD talked about it appearing in the "Ontario" APU, which originally was aimed at netbooks and low-power notebooks. Ontario will feature two Bobcat cores, along with a DirectX 11–capable graphics engine, a unified video decoder and the traditional platform interfaces for memory and the bus, in a single chip, initially manufactured on TSMC's 40nm process. The company now says this chip will require 9 watts of TDP (in AMD's measuring) and is quite clearly aimed at netbooks and small form factor desktops.

The new chip is called "Zacate," and it is apparently a higher-power version, requiring 18 watts of TDP, also with two Bobcat cores and the GPU, and aimed at ultrathin, mainstream, and value notebooks as well as desktops and all-in-ones. Both are part of the previously announced "Brazos" platform.

At the show, AMD displayed the chip, and showed pictures of the die (see below) and the chip, for size comparison. AMD says it is ramping production of these chips at TSMC now, and they should be in systems in early 2011.

AMD

To the extent that Zacate is being aimed at the mainstream notebook market, it seems to be repositioning the forthcoming "Llano" chip, which was originally supposed to be the company's first "Fusion" APU. Llano is a higher-end chip, with up to four CPUs (based on a modified version of AMD's current "Stars" core, used in the company's current chips) plus graphics, to be manufactured on GlobalFoundries' 32nm process. Originally Llano was positioned as being for a range of notebooks from thin-and-lights to desktop replacements, but I wonder if most of the thin notebook wouldn't be better suited for Zacate, which appears to be ready sooner; leaving Llano aimed more at higher-power notebooks (as part of the "Sabine" platform) and mainstream desktops (as part of the "Lynx" platform). Of course, we won't know until we see real products, and know for certain their performance and power use.

Llano does appear to have slipped a bit, but at the GlobalFoundries Global Technology Conference last week, AMD talked up the chip, along with the challenges of combining high-frequency CPUs with GPUs.

AMD

In that talk, AMD Sr. VP Chekib Akrout also talked about the challenges of chip scaling in the future, saying the graphics "has an insatiable demand for compute power" which in turn causes a need for increasing density. He said the industry as a whole needed to decide which technologies to invest in, citing such areas as FinFETs (a new design for transistors), denser memories, and photonics. In particular, he said the industry is on the horizon of die stacking, with multiple dies combined, with interconnects between them.

Akrout also showed a die photo of "Orochi," which will be the implementation of the Bulldozer cores, in dies that will have eight integer processing units (along with four floating point units). It will be aimed at servers (with a single-die version called Valencia and a dual-die version called Interlagos) and at higher-end desktops (where it will be called Zambezi), where it will be paired with discrete graphics.

AMD

All these code names can be a bit confusing, as AMD's roadmap is getting more complicated. And of course, Intel is readying a new set of products for next year as well, with its second generation 32nm products using its "Sandy Bridge" core that also combines CPU and GPU cores. I expect we'll get more details on the specific chips and the "Cougar Point" platform built around it at the Intel Developer Forum next week.

With the combination of CPU and GPU functions into single chips; with server chips getting more and more cores; and with new lower-power chips aiming at both notebooks and servers, 2011 promises to be a very interesting year for microprocessors.

For more of Michael Miller's take on technology, read his blog Forward Thinking.

About Our Expert

Michael J. Miller

Michael J. Miller

Former Editor in Chief

Michael J. Miller is chief information officer at Ziff Brothers Investments, a private investment firm. From 1991 to 2005, Miller was editor-in-chief of PC Magazine,responsible for the editorial direction, quality, and presentation of the world's largest computer publication. No investment advice is offered in this column. All duties are disclaimed. Miller works separately for a private investment firm which may at any time invest in companies whose products are discussed, and no disclosure of securities transactions will be made.

Until late 2006, Miller was the Chief Content Officer for Ziff Davis Media, responsible for overseeing the editorial positions of Ziff Davis's magazines, websites, and events. As Editorial Director for Ziff Davis Publishing since 1997, Miller took an active role in helping to identify new editorial needs in the marketplace and in shaping the editorial positioning of every Ziff Davis title. Under Miller's supervision, PC Magazine grew to have the largest readership of any technology publication in the world. PC Magazine evolved from its successful PCMagNet service on CompuServe to become one of the earliest and most successful web sites.

As an accomplished journalist, well versed in product testing and evaluating and writing about software issues, and as an experienced public speaker, Miller has become a leading commentator on the computer industry. He has participated as a speaker and panelist in industry conferences, has appeared on numerous business television and radio programs discussing technology issues, and is frequently quoted in major newspapers. His areas of special expertise include the Internet and its applications, desktop productivity tools, and the use of PCs in business applications. Prior to joining PC Magazine, Miller was editor-in-chief of InfoWorld, which he joined as executive editor in 1985. At InfoWorld, he was responsible for development of the magazine's comparative reviews and oversaw the establishment of the InfoWorld Test Center. Previously, he was the west coast bureau chief for Popular Computing, and senior editor for Building Design & Construction. Miller earned a BS in computer science from Rensselaer Polytechnic Institute in Troy, New York and an MS in journalism from the Medill School of Journalism at Northwestern University in Evanston, Illinois. He has received several awards for his writing and editing, including being named to Medill's Alumni Hall of Achievement

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