AMD will announce today at Hot Chips in Palo Alto the first detailed of its two new core designs, code-named "Bulldozer" and "Bobcat," which represent the first steps toward the company's next-generation CPU and Fusion APU designs.
Both the Bulldozer and Bobcat designs have been optimized for their target markets. Processors based on Bulldozer, which is being aimed at the high-performance desktop PC and server markets, and Bobcat, which is being intended for low-power notebooks, tablets, and small-form-factor desktop PCs, are expected to be released sometime in 2011. (AMD first demoed both Bulldozer and Bobcat last year.)
Bulldozer and Bobcat represent major changes in AMD's processor design philosophy, as well as significant challenges on the innovation front to Intel, which in recent years has dominated the consumer market at both the low end (with its Atom processor) and the high end (with processors such as its six-core Core i7-980X).
According to AMD, Bulldozer-based CPUs will based on advanced 32nm SOI process technology and utilize a new approach to multithreaded compute performance that, according to press notes, "balances dedicated and shared compute resources to provide a highly compact, high core count design that is easily replicated on a chip for performance scaling." In other words, by eliminating some of the redundancies that naturally creep into multicore designs, AMD hopes to take better advantage of its hardware capabilities, while utilizing less power.
AMD clarified Bulldozer's capabilities in a conference call with us, explaining that the chip combines shared components (Fetch, Decode, the Floating Point Scheduler, 128-bit FMAC, and L2 Cache, all all the module level; and L3 Cache and NB, all shared at the chip level), which AMD claims reduces power consumption and the amount of die space required, with dedicated components (the Int Schedulers, processing cores, and L1 DCache) that increase performance and stability. Bulldozer is capable of dynamically switching between shared and dedicated components to maximize performance per watt.
Each Bulldozer core contains two integer execution pipelines following the Fetch and Decode stages, along with one shared floating point unit. According to information provided by AMD, the amount of circuitry a second integer core requires to run is only 12 percent of the total module, which amounts to only about 5 percent of additional circuitry across the die. But AMD claims performance boosts beyond what Intel has demonstrated in its most recent products, likely by virtue of using two cores to process the same data Intel does in one (via Hyper-Threading). Will more cores in AMD's chips show better performance than more threads in Intel's? That remains to be seen.
Each chip will composed of multiple bulldozer modules. Divisions between the modules will be transparent to shared hardware, the operating system, and any applications being used. AMD claims that using modular architecture this way will speed up chip development and increase product flexibility. The first Bulldozer CPUs will be four-unit processors, like the one shown below, utilizing eight logical threads.
Bulldozer chips will also include new x86 instruction support (SSE4.1, SSE4.2, AVX, and XOP including 4-operand FMAC) to increase the capability of the design and advanced power management features. AMD also told us that it will introduce a new AM3+ socket for consumer versions of Bulldozer CPUs. AM2 and AM3 processors will work in the AM3+ socket, but Bulldozer chips will not work in non-AM3+ motherboards.
AMD estimates that Bulldozer chips will utilize about the same power as current Magny-Cours processors, but deliver 33 percent more cores and as much as a 50 percent increase in throughput. The first product slated to include a Bulldozer core is called Interlagos, a 16-core server ship that will debut next year. The server side will have new motherboard infrastructures: G34 for 12-core chips and C32 for eight-core chips.
Bobcat CPUs, on the other hand, will be an isolated core that does not share components. It will also be synthesizable, unlike the custom processing cores that are usually the industry standard. Bobcat cores will be capable of operating using under one watt of power, and AMD claims they will offer 90 percent of the performance of today's mainstream performance but use only half the area. AMD claims that Bobcat chips will be smaller than Intel's Atom processors, and yet deliver superior performance.
The design of the Bobcat microarchitecture minimizes data movement and thus unnecessary reads. Other features include:
Expect to see the first Bobcat CPUs on AMD's first Fusion accelerated processing unit (APU), "Ontario," which is due out sometime in 2011. Ontario will use two Bobcat cores, combine CPU and programmable GPU architectures (supporting DirectX 11), have a high-speed bus architecture and a shared, low-latency memory model (supporting DDR3).
