The days of 5nm chips already look numbered as Samsung today announced initial production of 3nm chips has begun.
The new, smaller and more efficient chips rely on Samsung's Gate-All-Around (GAA) transistor architecture and Multi-Bridge-Channel FET (MBCFET) technology. Previous generations of chips relied on fins being added laterally (FinFET), but MBCFET switches to nanosheet transistors which can be stacked vertically.
There are a number of advantages to doing this, including the ability to keep using FinFET's tools and manufacturing methodology, no additional area being required to increase speed due to the vertical stacking, and the on/off behavior improving so Samsung can reduce the operation voltage.
Compared to the 5nm process, Samsung says first-generation 3nm chips can cut power consumption by up to 45%, improve performance by 23%, and reduce the area required by 16%. The second-generation of Samsung's 3nm process will bring even larger gains of 50%, 30%, and 35% respectively.
Samsung hasn't announced who the first customers will be for its 3nm chips, but they will surely end up in the company's own mobile devices as soon as is viable. For now, Samsung's main rival TSMC is still focused on producing 5nm chips, with 3nm not arriving until later this year and 2nm planned for 2025. So Samsung seems to have a lead of a few months at least.